Vikash Kumar

About Me

5+

Years Experience

180nm → 18nm

Technology Nodes

30%

Efficiency Gain

10+

Tapeouts Supported

Experienced PDK Engineer specializing in LVS/PEX deck development, physical verification automation, extraction debug, and signoff-quality verification flows using Calibre nmLVS/nmDRC and Synopsys StarRC.

Technical Skills

LVS Development

95%

PEX Development

85%

Python Automation

80%

Calibre SVRF/TVF

90%

StarRC

85%

Experience

PDK Engineer

STMicroelectronics

Apr 2023 - Present

Developed LVS/PEX decks for 180nm–18nm nodes.
Supported successful tapeouts.
Reduced QA effort by 30%.
Mentored engineers and interns.

PDK Engineer

Sevya Multimedia (On-site at STMicroelectronics)

Apr 2021 - Mar 2023

Developed and validated LVS/PEX decks.
Built Python-based QA automation.
Worked on SVRF rule writing.
Improved verification turnaround time.

Training & Certifications

Layout Automation

STMicroelectronics (2024)

Calibre DRC/LVS Rules

Siemens EDA (2023)

Education

B.Tech (ECE)

Silicon Institute of Technology, Bhubaneswar

CGPA: 8.7 / 10

2017 - 2021

Class 12th

Delhi Public School, Ranchi

Percentage: 83.4 %

2014 - 2016

Contact

📧 iamkrvikash@gmail.com

📍 Greater Noida, India

PDK Engineer | LVS • PEX • Automation

About Me

5+

180nm → 18nm

30%

10+

Technical Skills

Experience

PDK Engineer

STMicroelectronics

PDK Engineer

Sevya Multimedia (On-site at STMicroelectronics)

Training & Certifications

Layout Automation

Calibre DRC/LVS Rules

Education

B.Tech (ECE)

CGPA: 8.7 / 10

Class 12th

Percentage: 83.4 %

Contact